All pull requests

Pull requests

• [FlyDSL] gfx1250 PA decode: BF16 wave-pair pipeline at D64, drop redundant D128 checks

  #7384·zhiding512 opened Nov 3, 2026Contributor·

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• [Config] Add gfx950 a8w8 blockscale GEMM tunings for Qwen3-14B-FP8

  Config
  #7383·xiaofei-zheng opened Nov 3, 2026Contributor·3 of 10 tasks·

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  6

• [Triton] [Config] Add gfx1201 gemm_a16w16_gated config

  #7382·klin2024 opened Nov 3, 2026Contributor·

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  2

• [Config] [Tune] GLM-5.3 a8w8 blockscale GEMM rows for gfx950

  #7381·amd-sriram opened Nov 3, 2026Contributor·3 of 6 tasks·

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  2

• [Triton] gfx950 unified attention: do not specialize on num_seqs (+ reduce_segments)

  #7380·vorapolsiloai opened Nov 3, 2026Contributor·

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  2

• [FlyDSL] [AOT] Build gfx1250-strict wheels from the gfx1250 kernel family

  FlyDSL
  #7379·zufayu opened Nov 3, 2026Contributor·

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  4

• [Triton] [Config] Add gfx1201 gemm_a16w16 config

  #7378·klin2024 opened Nov 3, 2026Contributor·

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  2

• Qsa index scorer/stage2

  #7377·demonsan opened Nov 3, 2026Contributor·

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  2

• [HIP] [Bugfix] Skip grouped top-k launches with zero tokens

  HIP
  #7376·XinyuJiangCMU opened Nov 3, 2026Contributor·

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  3

• [ASM] [HIP] [JIT] [gfx1250] asm mha fp8 fwd: add D192x128 per-tensor varlen kernel

  ASMHIPJIT
  #7375·shay-li77 opened Nov 3, 2026Contributor·6 of 11 tasks·

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  10

• [HIP] [JIT] Add gfx950 K-pool indexer cache writers

  HIPJIT
  #7374·sumin-hong opened Nov 3, 2026·

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  8

• [HIP] [Bugfix] sample kernels: keep token ids inside [0, vocab)

  HIP
  #7373·yitingw1 opened Nov 3, 2026Contributor·1 task done·

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  6

• [HIP] [FlyDSL] conv3d gfx950: kernel-only timing in tuner and tables, memoize fp32 bias

  #7372·huizzhan opened Nov 3, 2026Contributor·

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  2

• [ASM] perf(pa): update gfx950 unified MTP code objects

  ASM
  #7371·fangche123 opened Nov 3, 2026Contributor·10 tasks·

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  3

• [Triton/Gluon] [Config] Add gfx1201 RMSNorm large-M/small-N config

  #7369·klin2024 opened Nov 3, 2026Contributor·

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  2

• Decouple MoE public names from backends (#7150 batch 1)

  #7368·zufayu opened Nov 3, 2026Contributor·

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  2

• [fix] Size the custom all-reduce input pool from AITER_CAR_POOL_BYTES

  #7367·karverma-amd opened Nov 3, 2026Contributor·4 of 11 tasks·

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  2

• [Config] [gfx1250] Tune DeepSeek-V4.1-Flash MX32 FP8 GEMMs at large decode M

  Config
  #7366·karverma-amd opened Nov 3, 2026Contributor·5 of 12 tasks·

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  2

• [FlyDSL] [AMD][DSV4] fix: drop expert -1 pad routes in the fused TP route/psumkernel

  FlyDSL
  #7365·karverma-amd opened Nov 3, 2026Contributor·

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  2

• [Triton/Gluon] [gfx1250] Add WG cluster stream-k GEMM gemm_a16w16_streamk

  Triton/Gluon
  #7364·xiaohuguo2023 opened Nov 2, 2026Member·

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  17

  

• [MoE] Reuse stage2 scatter/reduce scratch in _flydsl_v2_stage2_wrapper

  #7363·afriedri opened Nov 2, 2026Contributor·2 of 3 tasks·

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  3

  

• [Triton/Gluon] (TDM/WMMA) grouped GEMM for gfx1250

  Triton/Gluon
  #7362·NimitPtl opened Nov 2, 2026Contributor·10 tasks·

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  6

• [Draft][aiter] Clamp FP8 per_Token / per_Tensor SiLU before SiLU at any swiglu_limit

  #7361·jatseng-ai opened Nov 2, 2026·

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  2

• [Triton/Gluon] [Perf] [KDA] Optimize the gfx950 FlashKDA prefill for GLM-5.3-Flash

  #7360·waqahmed-amd-fi opened Nov 2, 2026Contributor·10 tasks·

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  2

• [HIP] [Perf] Route gfx950 Opus MoE sort auto dispatch to multi-phase for E=384 decode

  HIP
  #7359·yelkhamra opened Nov 2, 2026·

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  1

  3